The invention relates to a method of manufacturing a high-voltage semiconductor device of the resurf type whereby a silicon body with a substrate of a first conductivity type is provided at a surface with a surface layer of the opposite, second conductivity type whose thickness and doping concentration are chosen such that the surface layer can be depleted at least locally throughout its thickness without breakdown, whereby the layer is subdivided into a number of mutually separated islands by means of insulation zones of the first conductivity type which are diffused into the surface layer, and whereby a circuit element with a surface zone of the first conductivity type which extends from the surface into the surface layer over part of the thickness of the surface layer is provided in at least one of said islands. The invention also relates to a semiconductor device manufactured by this method. Such a method and a device manufactured thereby are known inter alia from the article "A versatile 700-1200-V IC process for analog and switching applications" by A. W. Ludikhuize, published in IEEE Transactions on Electron Devices, Vol. 38. No. 7, July 1991, pp. 1582-1589.
The resurf principle is described inter alia in the article "High voltage thin layer devices (resurf devices)" by J. A. Appels and H. M. J. Vaes, (Techn. Digests IEDM 1979, pp. 238/241) and is based on the phenomenon that electrical breakdown in a comparatively thin layer is avoided by means of depletion of the layer throughout its thickness, so that an electric field distribution is obtained at the surface such that the breakdown voltage approaches its theoretical maximum value. It follows from calculations that the product N*d of the thickness d and doping concentration N must be of the order of 10.sup.12 atoms per cm.sup.2 for resurf. Owing to the high breakdown voltage, the resurf principle is highly suitable for use in high-voltage semiconductor devices such as indicated in the above publication by Ludikhuize. This describes integrated circuits in which the surface layer is provided in the form of an n-type epitaxial layer of silicon on a p-type silicon substrate. Various circuit elements for high-voltage applications are provided in the epitaxial layer, such as transistors of the LDMOST (lateral DMOST) type. Such a transistor has a p-type channel region or back-gate region in which an n-type source is formed. The drain lies at some distance from the back-gate region, separated therefrom by an interposed drift region. As is noted in the cited publication, some transistors are used under operating conditions different from those for other transistors. Thus the same voltage (ground) is applied to the back-gate region and to the substrate in a number of transistors, which may give rise to a high voltage between back gate and drain. In other transistors, for example transistors operated in the source-follower mode or transistors at the high-voltage side in bridge circuits, a very high voltage may also be applied to the back-gate region. A high voltage may be present between the substrate and the back-gate region in this situation, which renders it imperative that no electrical breakdown (punch-through) occur between the substrate and the back-gate region. A similar situation can arise in the source and drain of HV p-channel MOS transistors. To avoid punch-through, the product N*D, in which D is the thickness of the portion of the epitaxial layer between substrate and back-gate region, must be sufficiently great. This is achieved in the known device in that the epitaxial layer is made comparatively thick while N has a low value, so that sufficient charge remains below the comparatively thin back-gate region; in the embodiment described, however, the epitaxial layer has a thickness of no more than 23 .mu.m for N.apprxeq.7*10.sup.14 per cm.sup.3. It is found in practice, however, that it is comparatively difficult to manufacture such a device with a sufficient reproducibility owing to fluctuations in the doping, i.e. to keep. fluctuations of the total doping N*d within 20%.